At CesiumAstro, we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to
At CesiumAstro, we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to
About us At Cambridge Consultants, we believe the future of technology isnt just smart, it has agency. Were moving past passive tools and building human-centred digital services and products: systems that reason, plan, and act around
Role Overview As a CPU Microarchitecture/RTL design engineer at SiFive, you will be part of a team of engineers passionate about designing industry-leading CPU cores based on the revolutionary open‑source RISC‑V architecture. Responsibilities Architect, design and
Job Description This role requires expertise in RTL design, formal testing, and cross‑team collaboration to support SiFive’s advanced RISC‑V platforms. Responsibilities Specify, design and implement new arithmetic operators for arithmetic RISC‑V instructions, including floating‑point, vector, crypto and
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world.
# Senior ALU Design EngineerApplylocations: Cambridge, England, United Kingdomtime type: Full timeposted on: Posted Todayjob requisition id: R- # About SiFive *As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of
Responsibilities Architect, design and implement new features, performance improvements, and ISA extensions in RISC-V CPU core generators using Chisel. Integrate new design content into SiFives Chisel/FIRRTL framework and contribute to improvements to that framework to enable
Staff/Senior Staff RTL Design Engineer – CPU This is an exceptional opportunity to join a global pioneer in next-generation processor technology. My client is a leading semiconductor company at the forefront of CPU innovation, developing advanced
Job Description As a CPU Microarchitecture/RTL design engineer at SiFive, you will be part of a team of engineers who are passionate about designing industry-leading CPU cores, based on the revolutionary open‑source RISC‑V architecture. The role
Job Description As a CPU Microarchitecture/RTL design engineer at SiFive, you will be part of a team of engineers who are passionate about designing industry-leading CPU cores, based on the revolutionary open‑source RISC‑V architecture. Responsibilities Architect,
Job Title: Embedded Software Engineer Location: Cambridge (On-Site Working) Salary: £45,000 – £55,000 + Bonus & Benefits (Depending on Experience) Please Note: All Applicants must have the right to work in the UK without the need