About SiFiveAs the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s
KEY RESPONSIBILITIES Ensures the smooth and efficient operation and control of the Bakery Shop and production daily according to company policies. Directs, coaches, supports, supervises, and evaluates (with the Head Baker) all direct reports. Responsible for
Job Description As a CPU Microarchitecture/RTL design engineer at SiFive, you will be part of a team of engineers who are passionate about designing industry-leading CPU cores, based on the revolutionary open‑source RISC‑V architecture. Responsibilities Architect,
KEY RESPONSIBILITIES Directs, coaches, supports, supervises, and evaluates (with the Sous Chef) all direct reports. Must have excellent food knowledge and a full understanding of culinary terms. Must be able to read, understand, follow, and prepare
Job Description As a CPU Microarchitecture/RTL design engineer at SiFive, you will be part of a team of engineers who are passionate about designing industry-leading CPU cores, based on the revolutionary open‑source RISC‑V architecture. The role