A leading technology company based in Oxford is seeking an experienced professional to lead the miniaturisation of a groundbreaking computing platform. This role focuses on defining and executing the ASIC strategy while managing integration with various
Responsibilities Algorithm implementation: Translate complex probabilistic algorithms from high-level models, such as pseudocode/Python/C++/MATLAB, into highly pipelined, resource-efficient FPGA RTL. RTL design from scratch: Design and implement custom digital logic using VHDL where off-the-shelf vendor IPs are
Quantum Dice, based in Oxford, UK, seeks a senior FPGA engineer to translate probabilistic models into high-performance RTL and integrate with analogue front ends. You will design from scratch in VHDL/Verilog, work with PS/PL architectures, and ensure
About the Role We are seeking an experienced candidate to lead the miniaturisation of our cutting-edge probabilistic computing platform. This role is pivotal in defining and executing the ASIC strategy, ensuring optimal integration with other processing